ClearLogic
ClearLogic develops and markets pin-compatible ASICs transferred from Altera-based FPGA designs.
Business Model:
Revenue: $0
Employees: 1-10
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Detailed ClearLogic Information
Geographic Data
Address:
City: San Jose
State: California
Zip:
Country: United States
Financial Info
Stage:
series b
Raised Last:
$11M
Raised Total:$25M
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Description
Clear Logic develops and markets pin-compatible ASICs transferred from Altera-based FPGA designs. The conversion process uses the customer&s;s bitstream to replicate the FPGA&s;s functionality and pin-out in a smaller silicon area. files for chapter 11 on 2002 feb.
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| Announced Date | Company | Transaction | Money Raised |
|---|
| Announced Date | Transaction | Number of Investors | Money Raised | Lead Investors | 7/2000 | Venture Round | $12M | 12/2001 | Series B | 1 | $10.5M |
J &a; W Seligman J &a; W Seligman |
5/2000 | Series A | $0 |
Integrated Device Technology J &a; W Seligman Integrated Device Technology J &a; W Seligman |
5/2000 | Series A | 2 | $2M |
Integrated Device Technology J &a; W Seligman Integrated Device Technology J &a; W Seligman |
|---|
| Announced Date | Name | Price |
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